@Article{TorresJRBSCTB:2020:CoWeNe,
               author = "Torres, Vitor A. M. F. and Jaimes, Brayan R. A. and Ribeiro, 
                         Eduardo S. and Braga, Mateus T. and Shiguemori, Elcio Hideiti and 
                         Campos Velho, Haroldo Fraga de and Torres, Luiz C. B. and Braga, 
                         Antonio P.",
          affiliation = "{Universidade Federal de Minas Gerais (UFMG)} and {Universidade 
                         Federal de Minas Gerais (UFMG)} and {Universidade Federal de Minas 
                         Gerais (UFMG)} and {Universidade Federal de Minas Gerais (UFMG)} 
                         and {Instituto de Estudos Avan{\c{c}}ados (IEAv)} and {Instituto 
                         Nacional de Pesquisas Espaciais (INPE)} and {Universidade Federal 
                         de Minas Gerais (UFMG)} and {Universidade Federal de Minas Gerais 
                         (UFMG)}",
                title = "Combined weightless neural network FPGA architecture for 
                         deforestation surveillance and visual navigation of UAVs",
              journal = "Engineering Applications of Artificial Intelligence",
                 year = "2020",
               volume = "84",
                pages = "e103227",
                month = "Jan.",
             keywords = "Classification, Weightless neural network, Artificial neural 
                         networks, UAVs.",
             abstract = "This work presents a combined weightless neural network 
                         architecture for deforestation surveillance and visual navigation 
                         of Unmanned Aerial Vehicles (UAVs). Binary images, which are 
                         required for position estimation and UAV navigation, are provided 
                         by the deforestation surveillance circuit. Learned models are 
                         evaluated in a real UAV flight over a green countryside area, 
                         while deforestation surveillance is assessed with an Amazon forest 
                         benchmarking image data. Small utilization percentage of Field 
                         Programmable Gate Arrays (FPGAs) allows for a higher degree of 
                         parallelization and block processing of larger regions of input 
                         images.",
                  doi = "10.1016/j.engappai.2019.08.021",
                  url = "http://dx.doi.org/10.1016/j.engappai.2019.08.021",
                 issn = "0952-1976",
             language = "en",
           targetfile = "torres_combined.pdf",
        urlaccessdate = "09 maio 2024"
}